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Should "automatic logic" appear when firtool --verilog is specified?
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7
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184
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March 24, 2022
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One more error from Yosys
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0
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174
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March 24, 2022
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Longer .sv files from LLVM CIRCT than .v files from Chisel
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7
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214
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March 22, 2022
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How can I get firtool output into a folder?
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1
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130
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March 22, 2022
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[Torch-MLIR Community Meeting] 2022-04-04
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2
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479
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March 16, 2022
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Forward pass execution with custom forward derivative
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2
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171
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March 10, 2022
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CIRCT/MLIR dialect(s) for on-the-fly compiler generation for programmable heterogeneous (AI) accelerators?
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4
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400
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March 9, 2022
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Old ODM videos seem unavailable
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1
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150
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February 28, 2022
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LATTE '22 Announcement
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2
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343
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February 25, 2022
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FIRRTL to HW assertion error
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2
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184
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February 23, 2022
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Terminology: Instance
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2
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227
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February 10, 2022
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HIR vs Calyx
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4
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449
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February 4, 2022
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Reverse-Mode AD of Object-Oriented CFD Code w Enzyme
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4
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398
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January 22, 2022
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Joining the CIRCT Discord channel?
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2
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357
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January 13, 2022
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Reminder: Zoom link changed
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0
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189
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January 5, 2022
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Targeting Non-Verilog Backends
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4
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406
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July 22, 2021
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Why we need a staticlogic dialect?
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2
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249
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December 23, 2021
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CIRCT Bay Area Meetup (December 2021)
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5
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345
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December 15, 2021
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Can we use circt to generate netlist?
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2
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277
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December 9, 2021
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Using Moore to compile to LLHD dialect
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1
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485
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November 19, 2021
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Writing `sv.verbatim` output to separate file
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4
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183
|
November 17, 2021
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Basic TOSA support
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6
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843
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November 16, 2021
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Using hw.uarray
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9
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271
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November 15, 2021
|
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[Torch-MLIR Community Meeting] 2021-11-11
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0
|
304
|
November 10, 2021
|
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LLVM-MOS Backend
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2
|
400
|
November 7, 2021
|
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Unsupported by backend lowering: `torch.operator` op
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2
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473
|
October 28, 2021
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Aten::gelu is not a registered op
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1
|
241
|
October 22, 2021
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CIRCT Bay Area meetup
|
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2
|
221
|
October 13, 2021
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CROSS HW Section
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2
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205
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October 12, 2021
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Graduating mlir-npcomp -> torch-mlir
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4
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865
|
September 24, 2021
|