a bundle with one instruction

Is there a way to place a bundle a BUNDLE instruction into a packet with one instruction? Current code to end packet doesn’t handle this case:

// endPacket - End the current packet, bundle packet instructions and reset
// DFA state.
void VLIWPacketizerList::endPacket(MachineBasicBlock *MBB,
MachineInstr *MI) {
if (CurrentPacketMIs.size() > 1) {
MachineInstr *MIFirst = CurrentPacketMIs.front();
finalizeBundle(*MBB, MIFirst, MI);
}
CurrentPacketMIs.clear();
ResourceTracker->clearResources();
}

My initial idea was to simply add a NOP instruction to the CurrentPacketMIs, but it is proving to be more difficult than I thought. Would anyone care to help?

No. Bundles with single instructions are not allowed, but bundles can be mixed with instructions that are not bundled.

-Krzysztof

No. Bundles with single instructions are not allowed, but bundles can be
mixed with instructions that are not bundled.

-Krzysztof

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I'm slightly confused. Can you elaborate on what it means to have bundles
that are mixed with instructions that are not bundled?

What I need for my target is to bundle every instruction, even if it is
solo instruction. What would be the best way to achieve this? Current idea
is to add a NOP instruction if MI has only one instruction in it. Is it
possible?

Any help is appreciated.

You can have

BUNDLE // 2 instructions in a bundle
   instruction1 //
   instruction2 //
instruction3 // single, non-bundled instruction
BUNDLE // another bundle with 2 instructions
   instruction4 //
   instruction5 //

instruction3 is not bundled with anything, and it's between two other bundles---that's what I meant by "mixing".

On Hexagon, on the hardware level, every instruction belongs to some packet, whether it's a packet with one or more instructions. What we do is that we encode single instructions as single-instruction packets, but that happens after the IR is lowered to the MC form.

-Krzysztof

You can have

BUNDLE // 2 instructions in a bundle
  instruction1 //
  instruction2 //
instruction3 // single, non-bundled instruction
BUNDLE // another bundle with 2 instructions
  instruction4 //
  instruction5 //

instruction3 is not bundled with anything, and it's between two other
bundles---that's what I meant by "mixing".

On Hexagon, on the hardware level, every instruction belongs to some
packet, whether it's a packet with one or more instructions. What we do is
that we encode single instructions as single-instruction packets, but that
happens after the IR is lowered to the MC form.

-Krzysztof

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Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted
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Just to clarify, when you say MC form do you mean Hexagon Assembly?
Apologies if the question seems silly. I've been working with LLVM only a
few months.

No problem. At some point the machine instructions represented by a class "MachineInstr" are transformed into a representation using class "MCInst". This is the MC level I'm talking about. It's the representation that the llvm-mc uses.

-Krzysztof

Just out of curiosity, why Hexagon doesn't create a bundle with a single
instruction earlier? Wouldn't it be more consistent (and convinient) to
bundle all the instructions in one place (at MachineInstr level) rather
then handle it in different places?

The framework that handles bundles in lib/CodeGen will assert if you create a bundle with a single instruction. Most likely there are some assumptions in it that a bundle will have at least two, but I don't know the details.

-Krzysztof

No problem. At some point the machine instructions represented by a class
"MachineInstr" are transformed into a representation using class "MCInst".
This is the MC level I'm talking about. It's the representation that the
llvm-mc uses.

Do you mind pointing out where in the code this is happening?

For Hexagon, it happens in lib/Target/Hexagon/HexagonMCInstLower.cpp. In function "HexagonLowerToMC" to be exact.

For other targets, look in lib/Target/<target>/*MCInstLower.cpp

-Krzysztof

For Hexagon, it happens in lib/Target/Hexagon/HexagonMCInstLower.cpp. In
function "HexagonLowerToMC" to be exact.

For other targets, look in lib/Target/<target>/*MCInstLower.cpp

-Krzysztof

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Thanks.