Adding a 256 bit integer register class (i256) to the RISC-V backend

Beginners
1

I’ve added support for i256 similar to i128 in the ValueTypes.td, MachineValueType.h and Intrinsics.td files. But when I try to use it for my register class definition in RISCVRegisterInfo.td I get the following error.
Reg class def

class RISCVBReg<bits<5> Enc, string n, list<string> alt = []> : Register<n> {
  let HWEncoding{4-0} = Enc;
  let AltNames = alt;
}
// Branch registers
let RegAltNameIndices = [ABIRegAltName] in {
  foreach Index = 0-31 in {
    def B#Index : RISCVBReg<Index, "b#Index", ["b#Index"]>, 
    DwarfRegNum<[!add(Index, 192)]>;
  }
}

def BPR : RegisterClass<"RISCV", [i256], 256, (add
    (sequence "B%u", 0, 31)
  )>;

Error:

[1/796] Building IntrinsicImpl.inc...
FAILED: include/llvm/IR/IntrinsicImpl.inc
cd /home/nishant/LLVM/llvm-project/llvm/build && /home/nishant/LLVM/llvm-project/llvm/build/NATIVE/bin/llvm-tblgen -gen-intrinsic-impl -I /home/nishant/LLVM/llvm-project/llvm/include/llvm/IR -I/home/nishant/LLVM/llvm-project/llvm/build/include -I/home/nishant/LLVM/llvm-project/llvm/include /home/nishant/LLVM/llvm-project/llvm/include/llvm/IR/Intrinsics.td --write-if-changed -o include/llvm/IR/IntrinsicImpl.inc -d include/llvm/IR/IntrinsicImpl.inc.d
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: /home/nishant/LLVM/llvm-project/llvm/build/NATIVE/bin/llvm-tblgen -gen-intrinsic-impl -I /home/nishant/LLVM/llvm-project/llvm/include/llvm/IR -I/home/nishant/LLVM/llvm-project/llvm/build/include -I/home/nishant/LLVM/llvm-project/llvm/include /home/nishant/LLVM/llvm-project/llvm/include/llvm/IR/Intrinsics.td --write-if-changed -o include/llvm/IR/IntrinsicImpl.inc -d include/llvm/IR/IntrinsicImpl.inc.d
 #0 0x000000000067fe37 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/home/nishant/LLVM/llvm-project/llvm/build/NATIVE/bin/llvm-tblgen+0x67fe37)
 #1 0x000000000067dede llvm::sys::RunSignalHandlers() (/home/nishant/LLVM/llvm-project/llvm/build/NATIVE/bin/llvm-tblgen+0x67dede)
 #2 0x00000000006804bf SignalHandler(int) (/home/nishant/LLVM/llvm-project/llvm/build/NATIVE/bin/llvm-tblgen+0x6804bf)
 #3 0x00007f9d97ecc420 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x14420)
 #4 0x0000000000464c5f bool berase_if<std::_Bind<llvm::TypeInfer::EnforceSameSize(llvm::TypeSetByHwMode&, llvm::TypeSetByHwMode&)::$_13 (llvm::SmallSet<llvm::TypeSize, 2u, (anonymous namespace)::TypeSizeComparator>, std::_Placeholder<1>)> >(llvm::MachineValueTypeSet&, std::_Bind<llvm::TypeInfer::EnforceSameSize(llvm::TypeSetByHwMode&, llvm::TypeSetByHwMode&)::$_13 (llvm::SmallSet<llvm::TypeSize, 2u, (anonymous namespace)::TypeSizeComparator>, std::_Placeholder<1>)>) (/home/nishant/LLVM/llvm-project/llvm/build/NATIVE/bin/llvm-tblgen+0x464c5f)
 #5 0x0000000000464c35 bool berase_if<std::_Bind<llvm::TypeInfer::EnforceSameSize(llvm::TypeSetByHwMode&, llvm::TypeSetByHwMode&)::$_13 (llvm::SmallSet<llvm::TypeSize, 2u, (anonymous namespace)::TypeSizeComparator>, std::_Placeholder<1>)> >(llvm::MachineValueTypeSet&, std::_Bind<llvm::TypeInfer::EnforceSameSize(llvm::TypeSetByHwMode&, llvm::TypeSetByHwMode&)::$_13 (llvm::SmallSet<llvm::TypeSize, 2u, (anonymous namespace)::TypeSizeComparator>, std::_Placeholder<1>)>) (/home/nishant/LLVM/llvm-project/llvm/build/NATIVE/bin/llvm-tblgen+0x464c35)
 #6 0x0000000000464c35 bool berase_if<std::_Bind<llvm::TypeInfer::EnforceSameSize(llvm::TypeSetByHwMode&, llvm::TypeSetByHwMode&)::$_13 (llvm::SmallSet<llvm::TypeSize, 2u, (anonymous namespace)::TypeSizeComparator>, std::_Placeholder<1>)> >(llvm::MachineValueTypeSet&, std::_Bind<llvm::TypeInfer::EnforceSameSize(llvm::TypeSetByHwMode&, llvm::TypeSetByHwMode&)::$_13 (llvm::SmallSet<llvm::TypeSize, 2u, (anonymous namespace)::TypeSizeComparator>, std::_Placeholder<1>)>) (/home/nishant/LLVM/llvm-project/llvm/build/NATIVE/bin/llvm-tblgen+0x464c35)
 #7 0x00000000005b9aff EncodeFixedValueType(llvm::MVT::SimpleValueType, std::vector<unsigned char, std::allocator<unsigned char> >&) (/home/nishant/LLVM/llvm-project/llvm/build/NATIVE/bin/llvm-tblgen+0x5b9aff) #8 0x00000000005b7793 ComputeFixedEncoding(llvm::CodeGenIntrinsic const&, std::vector<unsigned char, std::allocator<unsigned char> >&) (/home/nishant/LLVM/llvm-project/llvm/build/NATIVE/bin/llvm-tblgen+0x5b7793)
 #9 0x00000000005b1aff (anonymous namespace)::IntrinsicEmitter::run(llvm::raw_ostream&, bool) (/home/nishant/LLVM/llvm-project/llvm/build/NATIVE/bin/llvm-tblgen+0x5b1aff)
#10 0x00000000005b569f llvm::EmitIntrinsicImpl(llvm::RecordKeeper&, llvm::raw_ostream&) (/home/nishant/LLVM/llvm-project/llvm/build/NATIVE/bin/llvm-tblgen+0x5b569f)
#11 0x0000000000627132 (anonymous namespace)::LLVMTableGenMain(llvm::raw_ostream&, llvm::RecordKeeper&) (/home/nishant/LLVM/llvm-project/llvm/build/NATIVE/bin/llvm-tblgen+0x627132)
#12 0x0000000000687dfc llvm::TableGenMain(char const*, bool (*)(llvm::raw_ostream&, llvm::RecordKeeper&)) (/home/nishant/LLVM/llvm-project/llvm/build/NATIVE/bin/llvm-tblgen+0x687dfc)
#13 0x0000000000627096 main (/home/nishant/LLVM/llvm-project/llvm/build/NATIVE/bin/llvm-tblgen+0x627096)
#14 0x00007f9d9795c083 __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x24083)
#15 0x00000000004062ee _start (/home/nishant/LLVM/llvm-project/llvm/build/NATIVE/bin/llvm-tblgen+0x4062ee)
Segmentation fault

When I replace i256 with v4i64 in the reg class def it works as expected.

2

Did you add handling of IIT_I256 in intrinsic encodings?

3

Yup that worked. Thanks!