Adding new Intrinsic - Overloading

Hello all,

I am experimenting with the LLVM code and want to add a new intrinsic. I followed the steps in this article - Extending LLVM: Adding instructions, intrinsics, types, etc. — LLVM 10 documentation

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Extending LLVM: Adding instructions, intrinsics, types, etc. — LLVM 10 d…

](https://llvm.org/docs/ExtendingLLVM.html)

I am not using ’llvm_any*_ty types’. My intrinsic function looks like:
def int_foo: GCCBuiltin<"__foo">, Intrinsic<[llvm_i32_ty], [llvm_i16_ty, llvm_i16_ty], []>;

I also defined it in ‘Builtins.def’.

If I use this, the generated IR shows up with the suffix ‘i16.i16’. Why?

As a result, it doesn’t match in the instruction selection & lowering phase. If I manually edit the IR file and remove, the .i16.i16 suffix, it matches.

Thanks in advance!