Hey, I’m adding a custom address space for a project I’m working on to act as a way to pass information down from the middle end down to code generation in aarch64. I’ve searched through the aarch64 backend code for uses of address spaces, and it seems it doesn’t treat different ones too differently - the only examples are optimizations that don’t fire on address spaces that aren’t zero. When I mark a pointer as a different address space, this isn’t intended to change any of it’s semantics from the compiler’s perspective, and I have been working to modify the backend such that when it checks if a pointer is in address space 0, it also checks if it is my new address space, as any optimization that would fire on an address space 0 pointer should have no reason not to fire on this new address space.
I did notice though in the AArch64FastISel.cpp file at line 583, there is a comment saying that fast instruction select is disabled for ‘special’ address spaces, that being any address space above 255. This gives me a few questions:
- What is fast instruction selection and what are the implications if it can’t be used on code where I’ve changed the address spaces of pointers?
- What are the special and ‘normal’ address spaces?
- Does it matter what address space I use in aarch64 for my custom work, outside of address space 0? It seems as if I may want to make sure I chose one above 255.
- If I did designate my new address space as ‘special’, would this really actually make it incompatible with the fast instruction selector? Like I said above, I’ve been changing backend specific optimisaitons to support this new address space, would I want to avoid doing the same here?
Thanks.