Allocation registers from two different banks in one instruction


I’m trying to properly allocate registers to simple instruction which has two operands (A & B).
There are two register banks B0 and B1.
The instruction has following constraint:
-each instruction can not use the same register banks for both A and B operand.

So there could be:
-inst B0:r1 B1:r1
-inst B1:r0 B0:r1
but following are not allowed:
-inst B0:r0, B0:r1
-inst B1:r0, B1:r1

Is there any possibility in LLVM to apply such constraint to Instructions so it will be taken into consideration during register allocation?


It’s a bit crude, but hasExtraSrcRegAllocReq exists for special cases like this