ARM assembler regression?

Clang Frontend
1

Hi,

While cross-compiling to ARMv7 on Linux x86-64 I get

…/projects/libcxxabi/src/Unwind/UnwindRegistersSave.S:375:15: error: register expected
vstmia r0, {d16-d31}

^

clang version is r221448.

2

Hi Ismail,

I doubt this is an assmbler regression, since we have it working natively:

http://lab.llvm.org:8011/builders/libcxx-libcxxabi-arm-linux

Could it be an FPU choice? like -mfpu=vfpv3-d16?

cheers,
--renato

3

Hi,

4

You got me wrong. The fpu is sane, and that used to work, but it's not
a regression in the assembler, rather, in the assembly code. :slight_smile:

That code is assuming all VFP have 32 double registers, when that's
not true. I'll fix it.

cheers,
-renato

5

> Hmm indeed but this used to work fine? Any other sane options for mfpu?
> Especially for machines without a Neon unit (Marvell seems to have
those).

You got me wrong. The fpu is sane, and that used to work, but it's not
a regression in the assembler, rather, in the assembly code. :slight_smile:

Yeah I found that later on and switch to -mfpu=vfpv3 as a temporary hack :slight_smile:

That code is assuming all VFP have 32 double registers, when that's
not true. I'll fix it.

Thanks!

6

Hi İsmail,

I committed a patch (r221341) a few days ago to prevent the assembler and disassembler form accepting D16-D31 for the FPUs of Cortex-M cores, which only have 16 D registers. I’m assuming you were originally compiling for v7M? It looks like that file will need some additional conditionalization before it can be used for Cortex-M targets.

Oliver

7

Hi,

8

This was caused by using “-mfpu=vfpv3-d16”, which only has 16 D registers. Switching to –mfpu=vfpv3 (with 32 D registers) is safe for Cortex-A targets, as all Cortex-A CPUs have 32 D registers (or no FPU).

Oliver

9

These are standard gcc ARMv7A flags, to be sure it can run on ant A9,
which not all of them have NEON.

Since there's no __ARM_FP_D16 in ACLE, the idea is to use __ARM_NEON
as a D32 detection, since there's no point in having 32 D registers
without NEON, and AFAIK, there aren't any ARMv7 boards with VFPv3-D32
without NEON.

It may not be perfect, but if there is any board out there, we can
always ask ARM to add a new macro to ACLE.

cheers,
--renato

10

Even those without NEON, like Tegra 3?

Using -mfpu=vfpv3 when you only have vfpv3-d16 is bound to create problems.

cheers,
--renato

11

Ah sorry, I was mistaken. VFPv3-D16 without NEON is a valid option for some Cortex-A cores.

Oliver

12

Should be fixed in r221532. Let me know.

cheers,
--renato