I’m trying to add new instruction and a new register class:
def EE_BITREV: EE_Inst24<(outs QR:$qa ,AR:$axr), (ins AR:$ax),
"ee.bitrev\t qa ax", []>
When disassembling: ee.bitrev q1, a1
I get Match_InvalidOperand
for the q1 operand. When looking at the
GenAsmMatcher.inc file in MatchTable0
I have: { 374 /* ee.bitrev */, Xtensa::EE_BITREV, Convert__imm_95_0__imm_95_0__Tie1_1_1, AMFBS_None, { MCK_qa, MCK_ax }, },
which is not what I’d expect since we have register class QR in the instr definition above.
Does anyone have an idea what I might be missing for this to be treated as reg operand and not immediate operand?