atomic memoperand patch

Just noticed that when we generate a custom lowering for some atomics that we forgot to transfer the MemOperand to the new instruction that touches memory.

   -- Mon Ping

Index: lib/Target/X86/X86ISelLowering.cpp

Hi,

    MIB.addReg(t2);
-
+ assert(bInstr->hasOneMemOperand() && "Unexpected number of
memoperand");
+ (*MIB).addMemOperand(*F, *bInstr->memoperands_begin());
+
    MIB = BuildMI(newMBB, TII->get(X86::MOV32rr), destOper.getReg());

this doesn't seem to be indented right (needs one more space).
Same for the rest of the patch.

Ciao,

Duncan.