Hi,
I’m trying to write a LLVM backend for a custom CPU architecture. The architecture that I’m currently working on has no LOAD, STORE instructions or any register in it, it is working directly on memory. Simple use of an instruction as follows:
ADD A B
When you use an add operation with two operands which are A and B as above, it simply sums data on both memory block A and B then writes it into memory block B. So, you can do any operation without need of any register.
I need to discard LOAD and STORE operations from DAG. Becaues of every operation need to use memory block adresses as their operands, I cannot simply discard LOAD and STORE by legalize the SelectionDAG. Is there any way to define backend for an architecture without LOAD and STORE operations in LLVM?
Also, immediate operations have non-standard value (14-bit integer) as its immediate operand. Is there any simple way to use non-standard values?
Thanks in advance.
When you use an add operation with two operands which are A and B as above,
it simply sums data on both memory block A and B then writes it into memory
block B. So, you can do any operation without need of any register.
LLVM's IR is pretty strongly register-based, and programs' dependency
chains are often not directly compatible with 2-operand RMW either.
I'd probably designate a bunch of fixed memory (stack?) as
pseudo-registers. Loads and stores would then be turned into MOV
instructions. You'd probably need some pseudo-instruction variants of
your instructions to cope with the pseudo-register operands. These
could then be turned into the real ones after register allocation in a
custom pass (e.g. convert "%R0 = OPrm random_mem" into "OPmm
mem-for-R0, random_mem").
You'd probably also want a pass before register allocation to combine
redundant use of the special memory, but that could come later.
Also, immediate operations have non-standard value (14-bit integer) as its
immediate operand. Is there any simple way to use non-standard values?
So "add mem, #imm" only allows a 14-bit immediate? You normally just
use an i32 during CodeGen and check that it's a permitted value when
choosing that instruction variant (using ImmLeaf).
Cheers.
Tim.