Hi everyone,

I found some peculiar behavior of TableGen when generating [TARGET]GenRegisterInfo.inc. Some register overlaps are generated twice in this file, leading to a compilation error. I think this is because in RegisterInfoEmitter.cpp, RegisterAliases are declared as “std::map<Record*, std::set<Record*>, LessRecord>”

and a requirement for std::map is that the comparison function (“LessRecord”) should correspond to a strict weak ordering; in this case this points to :

“StringRef1.compare_numeric(StringRef2) < 0”

which does not behave like strict weak ordering predicate on the set of strings. I have attached an example built upon snippets from StringRef.cpp, compiled with gcc version 4.4.5 (Debian 4.4.5-8) (I also saw that there is a workaround for gcc 4.x …).

Please tell me if I am doing something wrong or this is a real bug.

Thank you,

Alex

test_StringRef.cpp (2.36 KB)

Compare_numeric is supposed to be transitive. It is probably a bug in that function.

In particular, "V16" < "V1_q0" should not be true.

Can you fix it?

/jakob

Hi everyone,

I found some peculiar behavior of TableGen when generating [TARGET]GenRegisterInfo.inc. Some register overlaps are generated twice in this file, leading to a compilation error.

Hi,

What do you mean “overlapped register”?

Hello,

Based on TARGETRegisterInfo.td

def V0_q0 : TARGETReg<256, “v0”>;

def V0_q1 : TARGETReg<257, “v0”>;

def V0_q2 : TARGETReg<258, “v0”>;

def V0_q3 : TARGETReg<259, “v0”>;

def V0_l : TARGETRegWithSubregs<512, “v0”, [V0_q0, V0_q1]>;

def V0_h : TARGETRegWithSubregs<513, “v0”, [V0_q2, V0_q3]>;

def V0 : TARGETRegWithSubregs<640, “v0”, [V0_l, V0_h]>;

TableGen infers the following which it writes in TARGETGenRegisterInfo.inc:

const unsigned V0_q0_Overlaps = { TARGET::V0_q0, TARGET::V0_l, TARGET::V0, 0 };

that means that when V0_q0 gets written, all the registers it overlaps (i.e. V0_q0, V0_l, V0) get dirty. All this is handled by RegisterInfoEmitter in TableGen.

Best regards,

Alex