C code snippets that generate instructions from bitmanip extension in LLVM-RISCV backend

Thanking you in advance.
I am a beginner trying to generate RISC-V bit-manipulation instructions (B extension) in assembly. I could not generate the assembly for B-extension based on code given in Bitmanip draft 0.93. I want to generate assembly without calling built-in function (like __builtin_riscv_clmul(a, b)).
From ratified instructions I could not generate rolw,rorw,clz,orc.b ,clmul,clmulh,clmulr in assembly by using the pseudo code provided in draft bitmanip 0.94 and previous versions.

Can you elaborate on what exactly you’ve done and are trying to do? Compiler flags, source examples, etc.

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This may help you for building.
Also you may use the following flag after installing riscv-gcc,binutils,newlib

-DLLVM_DEFAULT_TARGET_TRIPLE=riscv64-unknown-elf \

To run

clang -target riscv32-linux-gnu -S -emit-llvm -g -Os program.c

or

clang --target=riscv32 -O -S -o- program.c -march=rv32i_zba_zbb_zbc_zbs

I will update with a setup page soon.

Huh? How’s that relevant? I’m asking what you tried that didn’t work so I can help you with your goal.

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Sorry for the misunderstanding ma’am.I will update soon.

I’m sorry for the delay.

This is the clmul code that didnt produce clmul instruction in assembly.

#define XLEN 32
#include<stdint.h>
#define uint_xlen_t uint32_t
uint_xlen_t clmul(uint_xlen_t rs1, uint_xlen_t rs2)
{
uint_xlen_t x = 0;
for (int i = 0; i < XLEN; i++)
if ((rs2 >> i) & 1)
x ^= rs1 << i;
return x;
}

Also I tried with clmulh,clmulr

uint_xlen_t clmulh(uint_xlen_t rs1, uint_xlen_t rs2)
{
uint_xlen_t x = 0;
for (int i = 1; i < XLEN; i++)
if ((rs2 >> i) & 1)
x ^= rs1 >> (XLEN-i);
return x;
}
uint_xlen_t clmulr(uint_xlen_t rs1, uint_xlen_t rs2)
{
uint_xlen_t x = 0;
for (int i = 0; i < XLEN; i++)
if ((rs2 >> i) & 1)
x ^= rs1 >> (XLEN-i-1);
return x;
}

This is based on bitmanip draft 0.94

Also I found in discussion there was an inconsistency in v 1.0 and draft 0.93 version and they also states that similar code is correct one.But I could not generate it in assembly.

As far as I know none of the CLMUL* instructions do pattern matching, if you want them you need to use the __builtin_riscv_clmul* intrinsics.

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Ma’am
But I could generate cpop with and without using __builtin_popcount intrinsics .Is there any code other than that specified in draft can generate clmul? @TNorthover

Yes. Some will pattern match, some won’t. CLMUL* currently are in the latter category.

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Can we get a list of such instructions ?

I believe currently CLMUL, CLMULH, CLMULR, XPERM4 and XPERM8 from skimming RISCVInstrInfoZb.td

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Thanks a lot.
I have another doubt ma’am.
Can we write pattern in backend for this particular instructions?

In theory, but it’s probably a bit fragile and hard to write. Plus it’s a niche instruction, and the cases it shows up are places where people are normally perfectly happy to use intrinsics, and likely should in order to guarantee they get the instruction they think they’re getting.

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