without blowing this up too much, i think I know how to add arguments into presumably cc1as_main.cpp, looking at other arguments like -o or --help in C++ sources, and doing same things for “–crypt” or “–random”, now to come. probably the arguments are added very elsewhere, but my point was to mention that i already found c1as as the LLVM assembly compiler and probably the right place for adding Instruction Set Randomization (ISR) to clang - ISR meaning generally opcode randomization or XOR encoding, for target dependent machine code output.
i was trying to grep myself into clang cc1as and then Instruction Encoding of CodeGen, but ended up reading documentation about MachineInstr (this sounds like what I need) and TargetInstrInfo, instead of finding obvious, generic, #define’s of numeric target dependent machine code opcodes in either llvm/lib/Target or elsewhere, to XOR with a key via Python3 script and a quick parser / regex. i also found the SelectionDAG to be highly related.
i was curious whether someone with a better understanding of CodeGen, and probably MC / Target Backends, would have an interest in the implementation of higher level abstraction Instruction Set Randomization into TargetInstr or MachineInstr, without yet caring about the execution environment of a randomly compiled ELF or a random Linux Kernel.
this could be HQEMU or an FPGA, later on, passing the XOR key to HQEMU ./configure depending on whether a new LLVM backend has to be synthesized for each clang --random --crypt run, or a smarter way can be found. in terms of an FPGA, one could maybe use high-level synthesis to Verilog. considering this paper https://llvm.org/devmtg/2010-11/Rotem-CToVerilog.pdf
both synthesized from a randomly generated LLVM target description (?), or smarter way to implement ISR (MachineInstr/TargetInstrInfo->opcode ^= xorkey?) into LLVM/clang. here is academic sample work for ISR in general: https://cs.brown.edu/research/pubs/theses/capstones/2020/kennan.jeffrey.pdf
hoping to get guidance / feedback.