Codegen for Accumulator based Architecture?

Hi,
Is there any existing llvm backend (codegen) for an Accumulator based architecture? If not, is there any tutorial, book or website that talks about how to write a llvm codegen for Accumulator based architectures in particular?

Thanks a lot!
JPR

Hi JPR,

I maintain it out-of-tree, but you can take a look at the GitHub - llvm-mos/llvm-mos: Port of LLVM to the MOS 6502 and related processors 6502 backend. It’s a modified accumulator architecture, since it has an additional pair of index registers for indexed addressing modes or general storage and transfer.

It’s difficult to prevent LLVM’s greedy register allocator from running out of registers with only 3 (or 1, for a classic accumulator architecture) available, but it’s possible to create a bank of pseudo-registers in memory. Taking this approach give LLVM overall a much easier time dealing with the architecture, and it makes it possible to set up a fairly standard RISC-ey register-based calling convention (e.g., C calling convention - llvm-mos).

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