Concept of subvalues for use with sub-registers/lanes

Hello,

MIR has the concept of lanes/subregisters through subidx. However, I’m not aware (or clang’s not capable) of how to represent subvalues in LLVM IR.

This makes the representation of such extractions/modifications of sub-values as complicated masking and bitwise of normal values.

I’ve been trying to optimize this by checking by specific masking and “or’ing”, “and’ing” and shifting operations to create new values that modify or extract just a bitrange of a value.

However, this doesn’t seem to scale because there way too many ways to do the same thing.

Wouldn’t it make sense to have something like:

%1 = i8 bitrange i32 %0, 16, 8

Where %1 = %0[16:23] bits represented as i8?

Kind regards,

Felipe Magno de Almeida
CEO @ Expertise Solutions
www: https://expertise.dev
phone: +55 48 9 9681.0157
LinkedIn: in/felipealmeida