I am trying to implement custom load/store instructions along with a custom type (sort of like X86_mmx type) that is used to call registers I have added to the target backend.
/llvm-project/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:9133: std::pair<llvm::SDValue, llvm::SDValue> llvm::TargetLowering::expandUnalignedLoad(llvm::LoadSDNode*, llvm::SelectionDAG&) const: Assertion `LoadedVT.isInteger() && !LoadedVT.isVector() && "Unaligned load of unsupported type."' failed.
%1 = load _TIE_nnp_AO, _TIE_nnp_AO* %ao, align 2, !dbg !11
I understand why the condition is failing as in the IR, the compiler is trying to load the type like so, and it doesn’t come under the classification of an integer or vector type. But I don’t understand the reason why its even being considered as a unaligned load.