Custom Static Scheduling

Hi there,
i created a Function Pass to retrieve the Control/Data Flow Graph from
a simple program,
now i would like to statically schedule the Instructions. Is this
possible by starting to modify the SelectionDAG Files ?
Or can i even build a "standalone" custom scheduler?
Thank you very much for any tipps.
Ben

Hi,

i created a Function Pass to retrieve the Control/Data Flow Graph from
a simple program,
now i would like to statically schedule the Instructions. Is this
possible by starting to modify the SelectionDAG Files ?
Or can i even build a "standalone" custom scheduler?
Thank you very much for any tipps.

You might be interested to look at our recent scheduler generalization
project in TCE [1].

In our case we convert from LLVM MachineInstructions to the IR of our
custom scheduler (CFG+DDG) which is then converted back to fresh
MachineBasicBlocks/MachineInstructions for assembly generation in
the LLVM side. The first (non-TTA) target we are experimenting with
is the Cell SPU.

Eventually we hope to see the LLVM code generation framework improved
to the point that less-and-less custom TCE library code (and our ADF) is
needed for static scheduling. However, the TCE scheduler generalization
project has started quite recently so there's plenty of work to do before
the compiler chain that includes the TCE scheduler can be considered
production quality.

[1] http://tce.cs.tut.fi/cgi-bin/moin.cgi/SchedulerGeneralization

Best regards,

Pekka Jääskeläinen <pekka.jaaskelainen <at> tut.fi> writes:

Hi,

> i created a Function Pass to retrieve the Control/Data Flow Graph from
> a simple program,
> now i would like to statically schedule the Instructions. Is this
> possible by starting to modify the SelectionDAG Files ?
> Or can i even build a "standalone" custom scheduler?
> Thank you very much for any tipps.

You might be interested to look at our recent scheduler generalization
project in TCE [1].

In our case we convert from LLVM MachineInstructions to the IR of our
custom scheduler (CFG+DDG) which is then converted back to fresh
MachineBasicBlocks/MachineInstructions for assembly generation in
the LLVM side. The first (non-TTA) target we are experimenting with
is the Cell SPU.

Eventually we hope to see the LLVM code generation framework improved
to the point that less-and-less custom TCE library code (and our ADF) is
needed for static scheduling. However, the TCE scheduler generalization
project has started quite recently so there's plenty of work to do before
the compiler chain that includes the TCE scheduler can be considered
production quality.

[1] http://tce.cs.tut.fi/cgi-bin/moin.cgi/SchedulerGeneralization

Best regards,

Hello Pekka,
thank you for your reply, that is an interesting project you have there - but
this is a little bit too much overhead for what i need to do.
Basically i need just to write a static scheduler for a simple program using
SDNodes/SUnits/SDep and their Succs and Preds. I am still trying to figure out
how they work together.

All the Best
Ben