Data flow graph with latency

I’m looking for the method to print out the Data Flow Graph(DFG) which has edges labeled with latency.
Is it possible to generate it from LLVM IR?

Instruction latency is target-dependent, so midend IR does not have it. Latencies can be found in instruction scheduling DAGs, although be aware that they are local (I.e., per basic block).

Best,
Alexey