I notice that there exist some classes for VLIW packetizing and other
classes for VLIW scheduling.
Apparently these classes share something in common. Can someone
explain why they
should have separate implementation (i.e., in different function passes)?
They have different implementations because they don’t do the same thing and don’t rely on the same structures. VLIW scheduling works on the SelectionDAG, right after the instruction selection, and it will schedule the DAG but it will not build any packet. The VLIW packetizer has been designed to work with machine instructions, using the ScheduleDAGInstr, and it does build packets (not scheduling). Both implementations have something in common, the DFAPacketizer which provides information about valid instruction packets. The former use it as a parameter for the computation of scheduling priorities and the latter use it to actually build the packets.
I’ve read in this list that scheduling on the selectionDAG is likely to be replaced by the machine scheduling in the near future.
Thank you, Ivan.
In my opinion, it seems more natual for a vliw scheduler working on
machine instruction lists, since information like structure hazards
can be preserved for packetizing and need not to re-compute it.
Happy to see new implementation of instruction scheduling coming true.