Originally reported https://discourse.llvm.org/t/expensive-checks-aarch64-builde…r/72956.
```
bb.0 (%ir-block.0):
ADJCALLSTACKDOWN 131072, 0, implicit-def dead $sp, implicit $sp
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
%0:gpr64all = COPY $sp
%1:gpr32 = MOVi32imm 131072
%2:gpr64all = SUBREG_TO_REG 0, killed %1:gpr32, %subreg.sub_32
%3:gpr64sp = ADDXri %fixed-stack.0, 0, 0
$x0 = COPY %0:gpr64all
$x1 = COPY %3:gpr64sp
$x2 = COPY %2:gpr64all
BL &memcpy, <regmask $fp $lr $wzr $xzr $b8 $b9 $b10 $b11 $b12 $b13 $b14 $b15 $d8 $d9 $d10 $d11 $d12 $d13 $d14 $d15 $h8 $h9 $h10 $h11 $h12 $h13 $h14 $h15 $s8 $s9 $s10 $s11 $s12 and 55 more...>, implicit-def dead $lr, implicit $sp, implicit $x0, implicit $x1, implicit $x2, implicit-def $sp, implicit-def $x0
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
%4:gpr64all = COPY $x0
BL @foo, <regmask $fp $lr $wzr $xzr $b8 $b9 $b10 $b11 $b12 $b13 $b14 $b15 $d8 $d9 $d10 $d11 $d12 $d13 $d14 $d15 $h8 $h9 $h10 $h11 $h12 $h13 $h14 $h15 $s8 $s9 $s10 $s11 $s12 and 55 more...>, implicit-def dead $lr, implicit $sp, implicit-def $sp
ADJCALLSTACKUP 131072, 0, implicit-def dead $sp, implicit $sp
RET_ReallyLR
# End machine code for function bar.
*** Bad machine code: FrameSetup is after another FrameSetup ***
- function: bar
- basic block: %bb.0 (0xaaaaf32a3288)
- instruction: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
*** Bad machine code: FrameDestroy <n> is after FrameSetup <m> ***
- function: bar
- basic block: %bb.0 (0xaaaaf32a3288)
- instruction: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
FrameDestroy <0> is after FrameSetup <131072>.
*** Bad machine code: FrameDestroy is not after a FrameSetup ***
- function: bar
- basic block: %bb.0 (0xaaaaf32a3288)
- instruction: ADJCALLSTACKUP 131072, 0, implicit-def dead $sp, implicit $sp
LLVM ERROR: Found 3 machine code errors.
```
The use of seemingly nop adjusts is legitimate but every other example I've found has them in down/up/down/up order. As opposed to the nested down/down/up/up order.
I thought this might be an ABI difference with handling the `byval` ptr. Here is the output for riscv64:
```
# *** IR Dump After RISC-V DAG->DAG Pattern Instruction Selection (riscv-isel) ***:
# Machine code for function bar: IsSSA, TracksLiveness
Frame Objects:
fi#0: size=131072, align=1, at location [SP]
Function Live Ins: $x10 in %0
bb.0 (%ir-block.0):
liveins: $x10
%0:gpr = COPY $x10
ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2
%1:gpr = ADDI %stack.0, 0
%2:gpr = LUI 32
$x10 = COPY %1:gpr
$x11 = COPY %0:gpr
$x12 = COPY %2:gpr
PseudoCALL target-flags(riscv-plt) &memcpy, <regmask $vlenb $x0 $x1 $x3 $x4 $x8 $x9 $x18 $x19 $x20 $x21 $x22 $x23 $x24 $x25 $x26 $x27 $x8_pd $x18_pd $x20_pd $x22_pd $x24_pd $x26_pd>, implicit-def dead $x1, implicit $x10, implicit $x11, implicit $x12, implicit-def $x2, implicit-def $x10
ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
%3:gpr = COPY $x10
ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2
$x10 = COPY %1:gpr
PseudoCALL target-flags(riscv-plt) @foo, <regmask $vlenb $x0 $x1 $x3 $x4 $x8 $x9 $x18 $x19 $x20 $x21 $x22 $x23 $x24 $x25 $x26 $x27 $x8_pd $x18_pd $x20_pd $x22_pd $x24_pd $x26_pd>, implicit-def dead $x1, implicit $x10, implicit-def $x2
ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
PseudoRET
# End machine code for function bar.
```
It also does a memcopy but instead has down/up/down/up ordering.
AArch64 at the same point:
```
# *** IR Dump After AArch64 Instruction Selection (aarch64-isel) ***:
# Machine code for function bar: IsSSA, TracksLiveness
Frame Objects:
fi#-1: size=131072, align=16, fixed, at location [SP]
bb.0 (%ir-block.0):
ADJCALLSTACKDOWN 131072, 0, implicit-def dead $sp, implicit $sp
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
%0:gpr64all = COPY $sp
%1:gpr32 = MOVi32imm 131072
%2:gpr64all = SUBREG_TO_REG 0, killed %1:gpr32, %subreg.sub_32
%3:gpr64sp = ADDXri %fixed-stack.0, 0, 0
$x0 = COPY %0:gpr64all
$x1 = COPY %3:gpr64sp
$x2 = COPY %2:gpr64all
BL &memcpy, <regmask $fp $lr $wzr $xzr $b8 $b9 $b10 $b11 $b12 $b13 $b14 $b15 $d8 $d9 $d10 $d11 $d12 $d13 $d14 $d15 $h8 $h9 $h10 $h11 $h12 $h13 $h14 $h15 $s8 $s9 $s10 $s11 $s12 and 55 more...>, implicit-def dead $lr, implicit $sp, implicit $x0, implicit $x1, implicit $x2, implicit-def $sp, implicit-def $x0
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
%4:gpr64all = COPY $x0
BL @foo, <regmask $fp $lr $wzr $xzr $b8 $b9 $b10 $b11 $b12 $b13 $b14 $b15 $d8 $d9 $d10 $d11 $d12 $d13 $d14 $d15 $h8 $h9 $h10 $h11 $h12 $h13 $h14 $h15 $s8 $s9 $s10 $s11 $s12 and 55 more...>, implicit-def dead $lr, implicit $sp, implicit-def $sp
ADJCALLSTACKUP 131072, 0, implicit-def dead $sp, implicit $sp
RET_ReallyLR
# End machine code for function bar.
```
AArch64 seems to make space on the current stack frame for the object, I don't understand yet what riscv64 is doing to not need to do that.