I want to generate the instruction like
addi 40, r3 ! i.e. r3 = r3 + 40
The format i wrote is
def ADDI : F1<opcode, (outs IntRegs:$dst), (ins IntRegs:$dst, i32imm:$imm)
"addi $imm, $dst",
[(set $IntRegs:$dst, (add $IntRegs:$dst, i32imm:$c))]
but it is not compiling.
what should be the format.
vikram
Hi Vikram,
The error message would be helpful, but the most likely problem is the
duplication of $dst. It should probably be:
def ADDI : F1<opcode, (outs IntRegs:$dst), (ins IntRegs:$src, i32imm:$imm)
"addi $imm, $dst",
[(set $IntRegs:$dst, (add $IntRegs:$src, i32imm:$c))]> {
let Constraints = "$src = $dst";
}
i.e. separate registers, but a constraint noting that they're actually
the same thing.
Tim.
[(set $IntRegs:$dst, (add $IntRegs:$src, i32imm:$c))]> {
Oh, and that immediate is called "$imm" elsewhere. That can't be helping.
Tim.
def ADDI : F1<opcode, (outs IntRegs:$dst), (ins IntRegs:$dst, i32imm:$imm)
"addi $imm, $dst",
[(set $IntRegs:$dst, (add $IntRegs:$dst, i32imm:$c))]
when we give an immediate in the string we give the same name so in the
third line use imm instead of c
in the third line we do not put $ prefix in front of Register class so your
third line should be
[(set IntRegs:$dst, (add IntRegs:$dst, i32imm:$imm))]