Generating x86 instruction prefixes in a MachineInstr for lowering

I’m working on some code that lifts assembly instructions up to the MachineFunction layer for X86/X64 to run some passes on, and have everything working except those that contain prefixes such as “repne scasb”. I’ve got the “scasb” lifted to a MachInstr, but run into issues lowering again and keeping the repne flag. I’ve tried setting the TSFlags on the instruction info, and other locations, but when lowering back down the flags do not seem to be honored. I was able to create a MachineInstr with the repne opcode to get it showing up in the assembly, but it appears on its own line since it’s an individual instruction. I tried to “bundle” the two instructions but then it just didn’t output the scasb instruction. Any hints on steps to get the prefixes working when it is re-lowered would be appreciated.

To get this working, I had to add the pseudo instructions to the X86 .td files like the REP_MOVS, etc. instructions, then use those opcodes. I’m wondering if these should be added to upstream LLVM?