Global ISel

I’m returning to LLVM after a 10 year hiatus.

I’m reading about Global ISel.

Does the tablegen for machine selection stay the same except for place where a selection dag was explicitly referenced?

For a new port, is it better to do everything using Global ISEL?



As somebody who repeatedly bangs their head against problems of the form “this would be so much easier if we didn’t still need SelectionDAG”, I’d say unequivocally “yes”.

Depending on what your backend is like you may still run into issues of limited maturity in GlobalISel, but especially if the architecture is in the slightest way “weird”, it will be worth it.

Unfortunately. You probably need to massage your patterns to get them to successfully import, but it’s generally compatible. Ideally we would be working towards some form of native patterns

Are there any plans to extend the existing GMIR Combiner infrastructure to work with instruction mnemonics like:

  • MOV32ri64
  • CMP32ri8

Depends what you mean? If you have selected instructions, you no longer have gMIR. We currently only have a limited gMIR->gMIR combiner. We could use table generated gMIR->gMIR legalizer (which is basically the same as a combine). We also could use a new, MIR-native syntax for tablegen selection patterns to machine opcodes. Not sure if anyone has any real need for selected MIR->selected MIR

I am not talking about selection patterns. I was asking about post-GMIR combines. What is the preferred mechanism for doing post-GMIR combines?

Are you sure you mean post-GMIR? I’m not aware of any common framework for that and I suppose it’s sort of frowned upon because ideally you get to what you need by a combination of GMIR combines and selection patterns.

In AMDGPU, there are some post-GMIR transforms that are sort of like combines, but they’re all just ad hoc C++ code.

I guess what you’re looking for is a sort of peephole optimizer.
Right now there is the MachineCombiner pass that you can feed with your own patterns using TargetInstrInfo::getMachineCombinerPatterns.

You can take a look at AArch64 for instance to see how to use it.

More generally, instruction selection and combines are pretty much the same thing and although I want to get to a point where we have a unified framework for that, we’ve never got around to do it.

Bottom line, try the MachineCombiner and if that doesn’t work for you, you may be able to reuse the Combiner infrastructure from GISel (currently used for all combine related stuff in GISel, e.g., look at AArch64PostLegalizerCombiner). And if that doesn’t work either, then you’ll have to write your own MachineFunctionPass.