GSoC Idea Project

Hi all,

I’m Xiang Cheng in Gatech and I’m interested in this project: http://llvm.org/OpenProjects.html#llvm_dbg_invariant

I noticed that this project is not in the GSoC selected projects list, so I think nobody is working on this.

Now I try to reproduce this issue on aarch64 Ubuntu-18.04 using the latest LLVM-10 release with following code (http://lists.llvm.org/pipermail/llvm-dev/2019-September/135433.html):

void b(void* d){}

void c(char* cc, void* d){}

void a() {

b(a);

for (;:wink:

c("", b);

}

int main(){

a();

return 0;

}

I compile it using “-O0 -g” or only “-O0”. However, I failed to reproduce the issue since all the outputs have the same instructions in their .text regions (attached below).

Could you please give a sample to reproduce this issue? Or is this bug has been fixed(https://bugs.llvm.org/show_bug.cgi?id=37240)?

Best,
Xiang

00000000004004f4 :

4004f4: d10043ff sub sp, sp, #0x10

4004f8: f90007e0 str x0, [sp, #8]

4004fc: 910043ff add sp, sp, #0x10

400500: d65f03c0 ret

0000000000400504 :

400504: d10043ff sub sp, sp, #0x10

400508: f90007e0 str x0, [sp, #8]

40050c: f90003e1 str x1, [sp]

400510: 910043ff add sp, sp, #0x10

400514: d65f03c0 ret

0000000000400518 :

400518: a9bf7bfd stp x29, x30, [sp, #-16]!

40051c: 910003fd mov x29, sp

400520: 90000000 adrp x0, 400000 <_init-0x388>

400524: 91146000 add x0, x0, #0x518

400528: 97fffff3 bl 4004f4

40052c: 90000000 adrp x0, 400000 <_init-0x388>

400530: 91188000 add x0, x0, #0x620

400534: 90000001 adrp x1, 400000 <_init-0x388>

400538: 9113d021 add x1, x1, #0x4f4

40053c: 97fffff2 bl 400504

400540: 17fffffb b 40052c <a+0x14>

0000000000400544 :

400544: d10083ff sub sp, sp, #0x20

400548: a9017bfd stp x29, x30, [sp, #16]

40054c: 910043fd add x29, sp, #0x10

400550: 2a1f03e8 mov w8, wzr

400554: b81fc3bf stur wzr, [x29, #-4]

400558: b9000be8 str w8, [sp, #8]

40055c: 97ffffef bl 400518

400560: b9400be0 ldr w0, [sp, #8]

400564: a9417bfd ldp x29, x30, [sp, #16]

400568: 910083ff add sp, sp, #0x20

40056c: d65f03c0 ret