[GSOC] Scan-build tracking platform

Hi all. I am student and I’d like to participate in GSOC 2014 this summer. Especially, I am interested in idea of improving clang’s scan-build platform.
I already have experience in this work. I developed a similar feature for a commercial Verilog/VHDL linting tool. Currently, I’m working on proof of concept and will show my code soon.

Also, I have a few questions:

  1. Shall I contact corresponding mentor directly or it would be better if I continue discuss subject here?
  2. How many slots does LLVM have this year? Was there fighting for the slots in previous years?

Thanks in advance.

Alexey,

1. Shall I contact corresponding mentor directly or it would be better if I
continue discuss subject here?

Neither. Please submit your proposal for discussion to the relevant
mailing list, that is - cfe-dev

2. How many slots does LLVM have this year? Was there fighting for the slots
in previous years?

The information about the slots allocation is not known until very late in GSoC.