How to define an instruction

From: Tianhao Shen 17862703959@163.com
Date: 11/14/2018 09:31
To: craig.topper@gmail.com craig.topper@gmail.com
Subject: Re: [llvm-dev] How to define an instruction

Hi, Craig
Thank you for replying to me.
I guess that you misunderstand my meaning about “can’r run”. I just want to run my instruction by LLVM using the commands “clang -O0 -emit-llvm test.c -S -o test.ll” and “lli test.ll”.But now ,when I use “lli test.bc” , the result shows as following:

Stack dump:
0. Program arguments: lli test.ll
LLVMSymbolizer: error reading file: No such file or directory
#0 0x000000000211b709 (lli+0x211b709)
#1 0x000000000211b79c (lli+0x211b79c)
#2 0x0000000002119496 (lli+0x2119496)
#3 0x000000000211b104 (lli+0x211b104)
#4 0x00007fe3d188a390 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x11390)
#5 0x00007fe3d1cba035
#6 0x0000000001b7ff7f (lli+0x1b7ff7f)
#7 0x0000000001a83d44 (lli+0x1a83d44)
#8 0x000000000126ee7b (lli+0x126ee7b)
#9 0x00007fe3d05e7830 __libc_start_main /build/glibc-Cl5G7W/glibc-2.23/csu/…/csu/libc-start.c:325:0
#10 0x000000000126b799 (lli+0x126b799)
illegal instruction(core dump)

Can I do what I write above ?
You wrote "The compiler can’t just make up a new instruction. ".What do you mean? LLVM doesn’t describe the calculation process, or scheduler model doesn’t but other model does ?

Thanks sincerely,
Tianhao Shen.

On 11/14/2018 01:55,Craig Toppercraig.topper@gmail.com wrote:

For the most part target specific intrinsics are black boxes to llvm. They’re just a little bit better than using inline assembly. They’re pretty much just a way to say from C code that you want to use a specific fancy hardware instruction that does some operation that’s not easy to express concisely in C. So they get passed through llvm and just tell the backend to emit a specific opcode into the final binary.

lli by default on x86 is a JIT compiler, it compiles llvm IR into native hardware instructions and makes the processor execute them. I believe you can force it to use an IR interpreter and not compile to native code, but I don’t think it would support a target specific intrinsic in that mode.

Thank you for answering my confusion.
I have another questions.
If I add really instructions instead intrinsics ,can I reach my purpose?
I guess ,the answer is “can’t”. I don’t find the anything about how machine to do about instructions,especially “ALU” instructions.
Thank you again,
Tianhao Shen

On 11/14/2018 13:42,Craig Toppercraig.topper@gmail.com wrote:

What exactly are you trying to do?

I want to add instructions about processing in memory at present .
So I try to add common instructions first.

~Tianhao Shen.

On 11/14/2018 14:56,Craig Toppercraig.topper@gmail.com wrote: