How to specify displacement range of a target instruction to llc

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#1

Hi,

I’m working on a project that use llvm openrisc beckend (currently not part of the upstream). Right now I’m looking at a bug where llc generates memory instructions that has out-of-range displacement, for example

l.sb 37668(r1), r2 in which 37668 is a 17 bit signed integer, but the instruction only allows 16 bit signed displacement. As a result, after running through the assembler, 37668 is encoded wrongly into -27668 because it’s being sign extended.

Can someone point to me where should I add code to do the check, any API I can use ?

Thanks,
Patrick

#2

Any help ???

#3

You'd need to ask the authors of this backend, not here.

#4

Thanks, I found the bug.