How to use property 'isCommutable' in target description file?

Hi everyone,

I practice writing target description file with MSP430 reference.

I add a multiply-and-add instruction as below:

let isTwoAddress=1 in {

def MULADD:Pseudo<(out GR16:$dst), (ins GR16:$src1, GR16:$src2, GR16:$src3),

“muladd\t{$dst, $src2, $src3}”,

[(set GR16:$dst, (add GR16:$src1, (mul GR16:$src2, GR16:$src3)))]>

}

How can i tell the system X=AB + C == X = BA + C == X=C+AB == X=C+BA by property ‘isCommutable’? Is it necessary to do that?

*** Another question: Why set isCommutable = 1 in ADD16rr but NOT set in ADD16ri?

let isCommutable = 1 in { // X = ADD Y, Z == X = ADD Z, Y
def ADD16rr : Pseudo<(outs GR16:$dst), (ins GR16:$src1, GR16:$src2),
“add.w\t{$src2, $dst}”,
[(set GR16:$dst, (add GR16:$src1, GR16:$src2)),
(implicit SRW)]>;
}
def ADD16ri : Pseudo<(outs GR16:$dst), (ins GR16:$src1, i16imm:$src2),
“add.w\t{$src2, $dst}”,
[(set GR16:$dst, (add GR16:$src1, imm:$src2)),
(implicit SRW)]>;

Regards

Hello

How can i tell the system X=A*B + C == X = B*A + C == X=C+A*B == X=C+B*A by
property 'isCommutable'? Is it necessary to do that?

Most probably you will need to write a special hook to commute this
instruction. However, everything depends on your target (e.g. if there
is an output register tied to one of the input).

*** Another question: Why set isCommutable = 1 in ADD16rr but NOT set in
ADD16ri?

Because all msp430 instructions are two-address, this means that
output register is tied to first input. That's why you cannot swap
operands for reg-imm operations.

Thanks to Anton.

Frankly said i don’t know the exact meaning and purpose of ‘isCommutable’. By my opinion “add.w r6, r7” != “add.w r7, r6”, so we shouldn’t set isCommutable = 1.

Who would like give an example to demonstrate what benifit it has if ‘isCommuatble=1’ in instruction selection, register allocation or other process?

Regards

2009/12/7, Anton Korobeynikov <anton@korobeynikov.info>:

Who would like give an example to demonstrate what benifit it has if
'isCommuatble=1' in instruction selection, register allocation or other
process?

isCommutable means that that codegen might commute the instruction if
this is profitable e.g. if this operation might make some moves noop.
Consider, e.g.

add r1, r2
mov r1, r2

commuting add will yield

add r2, r1
mov r2,r2

and mov can be eliminated