The machine target for which I am writing a backend has an unusual floating point model:

1. It is a 64-bit machine.

2. The register set is unified.

There are no separate floating point registers.

The floating point loads and stores are the same instructions as the fixed

point ones.

3. All floating point arithmetic operations are register-to-register and always

64-bits.

Thus, 32-bit operands must be promoted at some point.

The 64-bit results must be rounded to 32-bits before being stored as

32-bits.

Does anyone know of an implemented architecture similar enough to study/copy?

Does anyone have any other hints on how to progress?

Thanks

brian