Let’s consider the following piece of C code: (incomplete and not compilable )
result = initValue;
result = updatedValue_i;
For targets with conditional moves, the result is updated using the following sequence of instructions:
regTmp = regFalse;
if(condition2) regTmp = regTrue;
regResult = regTmp;
Now, you have 2 cases:
either condition2 = condition
In this case: regFalse is a phi node between the initial value of result and the current result. It’s very likely that regFalse and regResult will be the same hardware register. So the sequence of instructions reduce to just:
if(condition2) regResult = regTrue
either condition2 = !condition
In this case, regTrue is a phi node between the initial value of result and the current result. In this case, the sequence of 3 instructions cannot be reduced easily !
So, my question is (finally ;)):
Is there a way to introduce some intelligence in the select_cc lowering by reversing the condition if it is likely to generate more efficient code ?
I am asking this question because the lowering works on basic blocks with a set of input virtual registers and output virtual registers and all the connections between these 2 set of registers seemed to be “lost” (I don’t think we know at the lowering stage that an input register is a phi node between an output register and an initial value…)
Thank you !