Inline Assembly in IR

Dear,

Can anybody comment on inserting inline assembly in LLVM IR?

Hasn't been implemented. Could be, if someone really wanted to.

That’s probably not the right approach (best to keep this conversation on list because this is certainly not my area of expertise and other people might have better opinions).

If your new instruction is just a better way of describing adds on your chip then it should just be a custom target or sub target or CPU feature in the backend (llvms lib target, specifically the x86 target), I’d guess.

I think Pratik is doing this for a research project, in which case doing it quickly is probably better than doing it properly. As long as the code generator and/or assembler understands the new instruction, I think using inline assembly is the quicker way to implement it. For a real product, creating a real target/subtarget feature would be the right way to go. Regards, John Criswell