Instruction Itineraries

  I am working on a scheduler for X86 and would like to
include instruction latencies. It appears that this
information is gathered from instruction itineraries, but
that there isn't an itinerary for X86. I also can't seem
to find documentation on how to add this for X86. Any
pointers would be helpfull.


X86 is tricky. Every implementation is slightly different and "latency" of an instruction is dependent on more than just instruction itself. I think the most useful thing to model is SSE instructions with high latencies (sqrt*, movdup, etc.). For scalar instructions, they can almost be considered as uniform latency. It might be useful to assign load / store instructions to different virtual function units if we want to get fancy.

Unfortunately there isn't much documentation. The best thing to do is take a look at PPC and ARM targets. It's very simple, basically you define some functional units and itinerary classes. Then you can define instruction stages for each itinerary class (which means what fu are being acquired during each stage). The last thing is to assign instructions to its itinerary class.