Instruction scheduling done before or after register allocation

Hi,

I have read the steps of code generation from here: The LLVM Target-Independent Code Generator — LLVM 3.8 documentation

image

The LLVM Target-Independent Code Generator — LLVM 3…
Instruction Selection Instruction Selection is the process of translating LLVM code presented to the code generator into target-specific machine instructions.

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Could you please confirm that on actual implementation of LLVM’s code generator, the instruction scheduling is done before register allocation?

Many thanks,
Iulia Stirb

Hi,

Hi,

I have read the steps of code generation from here: The LLVM Target-Independent Code Generator — LLVM 3.8 documentation

image

The LLVM Target-Independent Code Generator — LLVM 3…
Instruction Selection Instruction Selection is the process of translating LLVM code presented to the code generator into target-specific machine instructions.

View on llvm.org

Preview by Yahoo

Could you please confirm that on actual implementation of LLVM’s code generator, the instruction scheduling is done before register allocation?

This is correct.

Cheers,
Quentin

Well we do both, we schedule before and after register allocation. Most targets use the MachineScheduler before register allocation and some opt in to the PostMachineScheduler after register allocation. You can look at the enableMachineScheduler() and enablePostMachineScheduler() methods.

-Matthias