Instruction scheduling: how does it work?

Hello LLVMdevs,

I would like to experiment with LLVM instruction scheduling, for the moment just trying a few schedules on a toy example, only with some slight differences between the schedules. I found that in MCSchedule (http://llvm.org/docs/doxygen/html/MCSchedule_8h_source.html) one can define LoadLatency, HighLatency etc for some operations. I was thinking to define a new CustomLatency, set some instructions to use it, and see how this affects the scheduler. How can I achieve this? I do not want to test only the default options (list-tdrr, list-burr).

Could anyone please explain how this is working? Can I find any step-by-step documentation of how I can change the instruction scheduling and (if necessary) register allocation in LLVM?

Any help is appreciated.

Thank you,
Alexandra