I’m trying to implement an instruction scheduler for a target ISA, I wonder is there any docs/instructions on how to do it.
I looked at other targets and see I need to write a TargetSchedule.td file to describe the functinal units and latency constraints. But right now it’s not clear to me how LLVM takes advantage of that, and where it’s doing the actual scheduling based on that.
Also I noticed there are MachineScheduler and PostRAscheduler, what’s the difference of those and how to enable them for a certain target.
Any suggestions on how to get started is appreciated.