Intrinsics for RISCV CSR instructions

I notice that no intrinsics have been defined for the CSRRW/CSRRS/CSRRC instructions.

It would be convenient to have intrinsics for these to allow CSR manipulation directly from IR code.

Interestingly, this seems to be true for PowerPC (no intrinsics for mfdcr/mtdcr) and X86 (no in/out) as well.

Are there plans to define standard RISCV intrinsics for this?

Its not something I’d considered but I’d be happy to review a proposal or patches if there’s precedent in LLVM with other backends l a good use case justification. Why would intrinsics be preferred to just using inline asm?

Best,

Alex

I would like to generate LLVM IR from my custom compiler that will lower to a CSR access instruction.

Can I emit arbitrary inline asm from LLVM IR without using clang?

Yes, see https://llvm.org/docs/LangRef.html#inline-assembler-expressions and take a look at clang’s -emit-llvm -S output for examples of how it represents inline asm in IR.

Best,

Alex