I’m noticing limitations with tablegen and LLVM’s handling of fixed length instruction encodings. It can only handle up to 64bit fixed length instruction encodings.
I’m wondering if anyone has spent time investigating lifting this limitation and what all problems it would hit with various bits of LLVM assuming the max size is 64bit.
In particular 128bit and 256bit fixed length instruction encodings are of interest to me which I can work around with going down the x86 path and lying to LLVM that it has variable instruction encoding.
Any thoughts or ideas?