LiveIntervals invalidates LiveVariables?

I though LiveVariables may be invalidated by LiveIntervals, but it's
declared not:

void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const
{
  AU.addPreserved<LiveVariables>();
  AU.addRequired<LiveVariables>();
  ...

LiveInterval may coalesce virtual registers and remove identity moves
instructions:

bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
  ...
  // perform a final pass over the instructions and compute spill
  // weights, coalesce virtual registers and remove identity moves

but the data structure LiveVariables::VirtRegInfo is _not_ updated.
That is, VarInfo::DefInstr may point to an invalid (being coalesced)
instruction.

We could potentially remove those VirtRegInfos for the registers we
coalesce. But since after coalescing there are no instructions refering
to those coalesced registers, it is logical that noone will ever query
the liveness of those registers (unless there is a bug somewhere in the
code). But strictly speaking we should remove the VirtRegInfo's for the
coalesced registers. Care to submit a patch?

Thanks,

You're right, that's a bug. I fixed it here:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20050905/028156.html

That line dates from when live interval analysis didn't do anything fancy. In the default code generator, nothing uses livevar after live intervals, so this bug didn't cause any problems.

-Chris

Indeed the coalesced registers may logically not be queried since they
do not appear in any operand list of the machine code, but the
VarInfo::DefInst in VirtRegInfo of the _representive register_ is
_not_ correct (I could trace the code at the time of writing this
mail).

In the other words, the patch not only have to remove the VarInfo
record in VirtRegInfo, but also have to update the record for
_representive register_.

to those coalesced registers, it is logical that noone will ever query
the liveness of those registers (unless there is a bug somewhere in the

Indeed the coalesced registers may logically not be queried since they
do not appear in any operand list of the machine code, but the
VarInfo::DefInst in VirtRegInfo of the _representive register_ is
_not_ correct (I could trace the code at the time of writing this
mail).

Yup.

In the other words, the patch not only have to remove the VarInfo
record in VirtRegInfo, but also have to update the record for
_representive register_.

Agreed.

-Chris