Hello,
I am Kiung, a graduate student in Computer Science at Yonsei University, South Korea. I am thrilled to come across such an intriguing project!
As I delve into researching related resources, I find myself filled with curiosity and a few questions arise.
Regarding the discussion on [RFC] Add 3-way comparison intrinsic, it’s noted that option 3 is favored for RISC-V architectures. I am interested to know what specific properties of RISC-V lead to this preference. (Is it derived from the lack sophisticated branch prediction mechanisms?)
Furthermore, I anticipate that additional intrinsics might be introduced in the future based on similar considerations. How can I identify instances where the compiler does not fully align with the characteristics of the target hardware like this?
Thanks 