LLVM SSA

Hi,

I am wondering if there are options that can be given to LLVM can be used to
generate code that is not in SSA, but in plain 3-address form ? (for
example, if there is an existing pass that does the register allocation and
dead variable elimination)

For example, if I have:

int x = 0;

void main()
{
   x++;
   x++;
}

I guess, if that is not the case, then, one needs to write their own pass.

I have written a small pass on the existing IR, but my goal now is to get it
to use as few variables as possible.

thanks,
Martin.

ivtm <martinaide1@yahoo.com> writes:

I am wondering if there are options that can be given to LLVM can be used to
generate code that is not in SSA, but in plain 3-address form ? (for
example, if there is an existing pass that does the register allocation and
dead variable elimination)

For example, if I have:

int x = 0;

void main()
{
   x++;
   x++;
}

I guess, if that is not the case, then, one needs to write their own pass.

Why do you want to avoid SSA?

SSA on LLVM is much simpler than it seems, the API makes generating SSA
natural, almost not noticing it. Your above example is trivial. Go to
http://www.llvm.org/demo and see how your C/C++ code is translated to
LLVM IR (pay attention to the options available on the web form).

And of course there are passes for register allocation, dead variable
elimination and more.

[snip]

I am familiar with the LLVM IR a little bit and I am parsing much more
complex examples. I just gave this example, to show that I would like to
have only 1 variable, not 2, the way SSA would generate it.
I am actually using LLVM purely as a front end to translate to .bc files and
then I have my own parser from there.

At any rate, is there an option to the llvm-gcc --emit-llvm to tell it to
produce .bc files that are at least space optimized (or even better, not in
SSA form) ?

thanks

Óscar Fuentes wrote:

At any rate, is there an option to the llvm-gcc --emit-llvm to tell it to
produce .bc files that are at least space optimized (or even better, not in
SSA form) ?

Yes, -O0

ivtm <martinaide1@yahoo.com> writes:

I am familiar with the LLVM IR a little bit and I am parsing much more
complex examples. I just gave this example, to show that I would like to
have only 1 variable, not 2, the way SSA would generate it.
I am actually using LLVM purely as a front end to translate to .bc files and
then I have my own parser from there.

At any rate, is there an option to the llvm-gcc --emit-llvm to tell it to
produce .bc files that are at least space optimized (or even better, not in
SSA form) ?

You could simulate a Load/Store architecture by mapping each variable to
an AllocaInst (which is what all compilers do, I guess). Then in your
passes track accesses to those allocas.

I tried the -O0 option and I am still getting output in SSA form:

I do:
llvm-gcc -O0 -emit-llvm -c x.c -o x.bc,

and then:

llvm-dis x.bc

Anton Korobeynikov-2 wrote:

LLVM IR is always in SSA form. If you *really* don't want it to be,
use allocas for everything and then don't run the mem2reg optimization
pass. This will represent all of your variables as stack locations
instead of registers, and it will not be SSA.

Reid

I tried using the mem2reg pass with opt,

e.g. opt -reg2mem x.bc > x2.bc

where x.bc was produced with:

llvm-gcc -O2 -emit-llvm -c x.c -o x.bc

This did not reduce the # of variables in x2.bc

I use -O2 because it produces the least # of instructions and hence the
least # of new SSA virtual registers.

Do you have a set of options to give to llvm-gcc or opt in mind ?

My goal is to take a .c file and obtain a .bc file with the smallest #
(or as small as possible) of variables.

Thanks

Reid Kleckner wrote:

I tried using the mem2reg pass with opt,

e.g. opt -reg2mem x.bc

No, don't use mem2reg, and...

where x.bc was produced with:

llvm-gcc -O2 -emit-llvm -c x.c -o x.bc

I use -O2 because it produces the least # of instructions and hence the
least # of new SSA virtual registers.

Don't do this either because it's going to run mem2reg. You want to emit unoptimized llvm ir and don't run mem2reg.

But you still haven't said why you'd want to do a thing so I imagine you're going to see less and less people responding to you.

-eric