Hi all,
I started to write an LLVM backend for custom CPU. I created XXXInstrInfo but there are some problems. I searched for it but I couldn’t find anything. Can anyone help me?
include “XXXInstrFormats.td”
def simm16 : Operand {
let DecoderMethod = “DecodeSimm16”;
}
def mem : Operand {
let PrintMethod = “printMemOperand”;
let MIOperandInfo = (ops GPRegs, GPRegs);
let EncoderMethod = “getMemEncoding”;
}
def addr : ComplexPattern<i32, 2, “SelectAddr”, [frameindex], [SDNPWantParent]>;
def LDRAM : FG1<0b000001, (outs GPRegs:$dst), (ins mem:$src), “ldram $dst,$src”, [(set GPRegs:$dst, (load addr:$src))]>;
def STRAM : FG1<0b000010, (outs), (ins GPRegs:$src, mem:$dst), “stram $dst,$src”, [(store GPRegs:$src, addr:$dst)]>;
def ADD : FG2<0b000000, (outs GPRegs:$dst), (ins GPRegs:$src1, GPRegs:$src2), “add $dst,$src1,$src2”, [(set GPRegs:$dst, (add GPRegs:$src1, GPRegs:$src2))]>;
Error Message:
LDRAM: (set GPRegs:{i32:f32}:$dst, (ld:{i32:f32} addr:iPTR:$src)<<P:Predicate_unindexedload>><<P:Predicate_load>>)
Included from /home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXXOther.td:10:
Included from /home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXX.td:1:
/home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXXInstrInfo.td:34:1: error: In LDRAM: Could not infer all types in pattern!
def LDRAM : FG1<0b000001, (outs GPRegs:$dst), (ins mem:$src), “ldram $dst,$src”, [(set GPRegs:$dst, (load addr:$src))]>;
^
STRAM: (st GPRegs:{i32:f32}:$src, addr:iPTR:$dst)<<P:Predicate_unindexedstore>><<P:Predicate_store>>
Included from /home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXXOther.td:10:
Included from /home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXX.td:1:
/home/jwon/Desktop/llvmTest/llvm-3.4/lib/Target/XXX/XXXInstrInfo.td:36:1: error: In STRAM: Could not infer all types in pattern!
def STRAM : FG1<0b000010, (outs), (ins GPRegs:$src, mem:$dst), “stram $dst,$src”, [(store GPRegs:$src, addr:$dst)]>;
^
Thanks in advance.