Lowering to FIRRTL dialect: lowering to FModuleOp from an Op that does not have clock and reset ports

Incubator CIRCT
1

Hello. I am having trouble while lowering to FModuleOp. The problem is that my Op from which I am lowering does not have clock and reset ports. The result is that I cannot insert the body of my Op into FModuleOp because of the different number of block arguments. I am doing it like this:

 auto &region = graphOp->getRegions().front();
 rewriter.mergeBlocks(&region.getBlocks().front(),
     fModuleOp.getBodyBlock(), fModuleOp.getBodyBlock()->getArguments());

Is there a way to insert a body of my Op into a FModuleOp without adding clock and reset ports to my Op?

2

I think this is really more of a general MLIR question than something specific to CIRCT. In this case, I think you would want to change what you pass in that third argument to mergeBlocks. For example, if you don’t want all the block arguments from the fModuleOp, I think you could create a SmallVector<Value> that includes just the block arguments you care about, and pass that for the third argument to mergeBlocks.

Without some more context about what the IR you’re merging looks like, it’s hard to be more specific. I’m not really sure how the block arguments are expected to be used. But if you share more specifics about the IR before and the desired IR after, we could probably provide some pointers.

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3

Thank you very much! It helped.

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