Minor cosmetic issues

In -help output,

  -help - Display available options
(--help-hidden for more)
Both single and double - option markers are accepted, which is good.
It would probably be better to refer to options consistently using the
single marker in all cases.

    =linearscan - linear scan register allocator
    =pbqp - PBQP register allocator.
Period at end of output, unlike in other similar lines

  -join-liveintervals - Coalesce copies (default=true)
  -regalloc - Register allocator to use:
(default = linearscan)
  -rewriter - Rewriter to use: (default: local)
It would probably be better to use the first style consistently throughout.

In -version output,

Low Level Virtual Machine (http://llvm.org/):
  llvm version 2.6svn
  Optimized build.
  Built Feb 14 2010(11:05:20).

  Registered Targets:
    alpha - Alpha [experimental]
    arm - ARM
    bfin - Analog Devices Blackfin [experimental]
    c - C backend
    cellspu - STI CBEA Cell SPU [experimental]
    cooper - PIC16 Cooper [experimental]
    cpp - C++ backend
    mips - Mips
    mipsel - Mipsel
    msil - MSIL backend
    msp430 - MSP430 [experimental]
    pic16 - PIC16 14-bit [experimental]
    ppc32 - PowerPC 32
    ppc64 - PowerPC 64
    sparc - Sparc
    systemz - SystemZ
    thumb - Thumb
    x86 - 32-bit X86: Pentium-Pro and above
    x86-64 - 64-bit X86: EM64T and AMD64
    xcore - XCore
This would probably look better if the second block were shifted two
spaces left, to have the same alignment as the first block.

Hi Russell, I took care of these points except for

In -version output,

Low Level Virtual Machine (http://llvm.org/):
  llvm version 2.6svn
  Optimized build.
  Built Feb 14 2010(11:05:20).

  Registered Targets:
    alpha - Alpha [experimental]
    arm - ARM
    bfin - Analog Devices Blackfin [experimental]
    c - C backend
    cellspu - STI CBEA Cell SPU [experimental]
    cooper - PIC16 Cooper [experimental]
    cpp - C++ backend
    mips - Mips
    mipsel - Mipsel
    msil - MSIL backend
    msp430 - MSP430 [experimental]
    pic16 - PIC16 14-bit [experimental]
    ppc32 - PowerPC 32
    ppc64 - PowerPC 64
    sparc - Sparc
    systemz - SystemZ
    thumb - Thumb
    x86 - 32-bit X86: Pentium-Pro and above
    x86-64 - 64-bit X86: EM64T and AMD64
    xcore - XCore
This would probably look better if the second block were shifted two
spaces left, to have the same alignment as the first block.

because I'm not sure what you mean.

Ciao,

Duncan.

Well, "Low Level Virtual Machine (http://llvm.org/):" is indented 0
spaces and the three lines following it are indented 2 spaces.

"Registered Targets:" is indented 2 spaces and the lines following it
are indented 4 spaces.

If "Registered Targets:" and the lines following it were shifted to
the left 2 spaces, so that they were indented 0 and 2 spaces
respectively, it would line up with "Low Level Virtual Machine
(http://llvm.org/):" and its accompanying three lines of text, so it
would look better.