I use the machine scheduler with my out-of-tree backend.
Is it possible to tell the machine scheduler that certain function-live-in physical registers (i.e., function arguments) have a non-zero latency?
Said another way, I want to indicate to the scheduler that certain physical registers are not available at the beginning of the function's entry block and that attempting to access those registers will incur a stall.
Thanks,
Nick Johnson
D. E. Shaw Research