[Modeling] About the structure of my allocator

I need to model my registers for my allocator. I need to identify the super-register and the sub-register conflicts. Something like:

For each set of registers R in the set of aligned registers defined by the input request virtual register alpha. Now each register block r in R can have zero, one, or more registers defined in the block started at the aligned size and ending at the aligned size plus the request register alpha’s size. The final step is to weigh and choose a block to put alpha into.

How do I model the registers R and register blocks r to obtain my desired information?

  • Thanks
  • Jeff Kunkel

Would I be correct in assuming that the alias set is defined as the registers which may reside in the same space as the register? In other words the register is either a super or sub register which holds the same physical location in the register set?

Could someone please explain what the Alias set is if it is not what I described above?

TargetRegisterInfo::getAliasSet( unsigned reg )

Thanks
Jeff Kunkel

Would I be correct in assuming that the alias set is defined as the registers which may reside in the same space as the register?

Yes.

In other words the register is either a super or sub register which holds the same physical location in the register set?

No.

Could someone please explain what the Alias set is if it is not what I described above?

An alias overlaps the register in some way such that both cannot be used at the same time. All sub-registers and all super-registers are aliases, but there may be aliases that are neither.

It is very rare to have an alias that is not a sub or super.

Would I be correct in assuming that the alias set is defined as the
registers which may reside in the same space as the register? In other words
the register is either a super or sub register which holds the same physical
location in the register set?

No. Aliased stuff might easily be neither sub- nor superregister.

Could someone please explain what the Alias set is if it is not what I
described above?

Think about MMX regs and x87 ones.

Thank you!

The pieces are starting to fall into place finally.

I need to track which MachineBasicBlocks branch into other MachineBasicBlocks. How do I do it?

I see a MachineOperand can hold a MachineBasicBlock*. Does this mean the instruction may branch to the MachineBasicBlock, or can it be something like an object reference?

  • Thanks,
    Jeff Kunkel

I need to track which MachineBasicBlocks branch into other MachineBasicBlocks. How do I do it?

Look at the Predecessor/Successor lists, which are target-independent

I see a MachineOperand can hold a MachineBasicBlock*. Does this mean the instruction may branch to the MachineBasicBlock, or can it be something like an object reference?

It can also be the dreaded gcc "address of label" extension. Number and ordering of instruction operands is target-dependent.

Is there any way to tell where in the Instruction list, the branch to the other MachineBasicBlock happens? I know in the BasicBlock had a nice api for it.

Thanks,
Jeff Kunkel

It is at the end allowing for oddities like debug info and multiple branches. You might want to look at AnalyzeBranch.

Perhaps what I think is a problem really is not a problem.

So when a jump occurs from one block A to block B, then the registers are certain state, and register allocation happens with the initial state defined by A->B. When a third block C jumps to block B, the state of the registers are different. Thus register allocation needs to account for the jump from C->B, by a few ways:

  1. The allocator defines A->B as the conformity state. Thus when C->B, C must conform to the state of the register from A.
  2. A branch may occur where B’ = B in respect to the instructions, but register allocation from C->B’ will be different because of differing initial states.

The information I need is where the jumps occurs in the instructions vector.

Thanks,
Jeff Kunkel

Perhaps what I think is a problem really is not a problem.

Yep.

The information I need is where the jumps occurs in the instructions vector.

The machine instructions are already separated into basic blocks.

http://en.wikipedia.org/wiki/Basic_block

/jakob

Thank you so much! This locks together the final piece.