"No machine model for <op> on processor"?

I’m trying to figure out if our itinerary definitions are actually doing anything (I’m thinking not, but I’m not entirely sure how to debug itineraries). I ran:

llvm-tblgen -I …/…/…/include/ --gen-subtarget --debug-only=subtarget-emitter XSTG.td

And in the output I see lots of messages like

“Itinerary for ADDF32_RI: II_ADDSUBF
No machine model for ADDF32_RI on processor XSTGGenericItinerariesModel”

Is this something to be concerned about?

The relevant defs are in our XSTGSchedule.td:

def ALU : FuncUnit;
def FPU : FuncUnit;
def AGU : FuncUnit;
def DMA : FuncUnit;
def QMA : FuncUnit;

def II_ADDSUBF : InstrItinClass; // addF, subF, cmpF

def XSTGGenericItineraries : ProcessorItineraries<[ALU,FPU,AGU,DMA,QMA], [], [

InstrItinData< II_ADDSUBF, [InstrStage<3, [ALU]>]>,