Hi,
I defined an instruction like this:
def LDM : OpusInstSTMLDM<0x27, 6, (outs REG_RANGE:$regRange),
(ins MEM_LDM:$addr),
“ldm $regRange, $addr”, []>, Requires<[HasOpus3Enc]>;
REG_RANGE will be:
def REG_RANGE : Operand {
let MIOperandInfo = (ops GR32, GR32);
…
}
Now I was expecting the NumDefs of LDM’s MCInstrDesc to be 2. Yet it is 1. This cause -verify-machineinstrs pass to fail.
Basically it seems like tablegen doesn’t look take into account sub-operands to calculate NumDefs’s MCInstrDesc.
Is this a bug or by design?
Thanks.