Parallel IR [PIR] --- Discussion sheet

Hi Johannes,

Our research group is very interested in extending the LLVM IR to support parallelism, and we are doing research in this topic. In our group, in order to target parallel hardware we designed a parallelism abstraction which we call Heterogeneous Parallel Virtual Machine (HPVM) consisting of a hierarchical dataflow graph with shared memory and vector instructions. Based on the HPVM abstaction, we developed a virtual istruction set that aims to achieve functional and perfomance portability, that is also used as a compiler IR for optimizations. HPVM is build on top of LLVM IR using LLVM intrinsics. We have implemented prototype backends that translate the HPVM abstractions to nVidia GPUs, Intel’s AVX vector units, and to multicore X86 processors. We have seen that HPVM can effectively express many forms of parallelism, including task parallelism, coarse-grain data parallelism, fine-grain data parallelism, and pipelined parallelism. Also, that it provides flexibility in mapping different parts of an application down to heterogeneous hardware, and is expressive enough to express memory tiling, essential for achieving high performance on GPU and CPU targets. (For more details about this, I can provide a link to our technical report.)

I am looking forward to discussing this further, as well as other aspects of this topic, during the LLVM Developers Meeting.

Best regards,
Maria Kotsifakou
PhD candidate, UIUC