The architecture I am working with supports moving values directly from one register to another, or moving an immediate straight to a register, and I cannot figure out how to do this in LLVM. I originally tried matching something like [(set RegisterClass:$dest, RegisterClass:$src)] in my TargetInstrInfo.td:
def MOVrr : MyInstrClass<(outs CPURegs:$dest), (ins CPURegs:$src), “mov $dest,$src”, [(set CPURegs:$dest, CPURegs:$src)]>;
However this matches very random inputs - such as (set RegisterClass:$dest, (or RegisterClass:$src1, RegisterClass:$src2)), which is just strange - and is obviously not correct - for a start, it only has two operands.
How should I be pattern matching this sort of instruction? Will I have to look into doing something with the TwoAddressInstructionPass? (http://llvm.org/docs/CodeGenerator.html#regAlloc_twoAddr). I believe a few of the backends have 2-operand moves, but I do not understand them at all; X86 for example seems to match them just against the DAG pattern , which is… confusing, to say the least.
Any help much appreciated,