I am implementing a multiply-add instruction with multiple flavours: for halfs, words and double operands. The instruction that deals with word operands, for 64-bit RISCV, works as expected, except that it has a sext.w instruction right after my instruction. That sext.w should not be emited because of the pattern for sexti32_allwusers.
I am using hasAllWUsers in a PatFrag and the custom instruction is emited when expected thanks to that so it’s value is true. But it seems like it’s value is false for the pattern at the pattern of sexti32_allwusers, since the sext.w is emitted.
Any ideas why sext.w gets emitted?
See RISCVDAGToDAGISel::hasAllNBitUsers, RISCVDAGToDAGISel::doPeepholeSExtW and various functions within RISCVSExtWRemoval.
Thanks, adding the custom instruction as a case statement at RISCVDAGToDAGISel::doPeepholeSExtW did remove the sext.w. That’s great but shouldn’t the pattern of sexti32_allwusers work?
Also, is there anything similar for the half-typed custom instructions? Because srai on slli is emitted right after the half-typed custom instruction.
RISC-V only has a rich set of W-suffixed instructions, there are no H equivalents (other than loads/stores and Zfh X<->F moves). If you’re introducing them then that’s likely your problem to solve.